Many types of adapter cards for computer systems, including high performance I/O cards, consist of two sections, an I/O interface section and a processor section. The I/O interface section usually implements an industry standard I/O interface, such as, for example, the Small Computer Systems Interface (SCSI), the Asynchronous Transfer Mode (ATM) interface, the Fibre Channel interface, the Universal Serial Bus interface, the IEEE 1394 interface, the Ethernet and other common network interfaces, and other well known I/O interfaces. The processor section typically adds intelligence to the adapter card and enables it to perform capabilities not usually found in adapter cards based solely on an industry standard interface. A typical processor section often comprises a processor, memory, control logic, and maintenance logic. These components may or may not also be industry standard or off-the-shelf components. The processor section typically executes proprietary program code that defines the added capabilities of the card. The software is usually stored within a non-volatile storage medium on the card, such as a read only memory (ROM) or the like.
Developing high performance computer I/O cards in today's swiftly changing marketplace is a challenging task, particularly where time to market is critical. Designing a high performance adapter card having separate I/O and processor sections is particularly difficult because one section usually cannot be tested without the other section. Thus, for example, a delay in the design of the I/O section may hold up testing and debugging of the software and hardware of the processor section. Another difficulty in designing a high performance adapter card of this type is that the I/O sections are typically implemented using chipsets of other manufacturers. Delay in the planned release of a new chipset by one of these manufacturers may again hold up the design and testing of the processor section of a card. The dependence of the I/O and processor sections on each other also makes it difficult to test the processor section with different types of I/O interfaces and with chipsets from different manufacturers.
Consequently, a need exists for methods and apparatus that facilitate the design, testing, and debugging of high performance adapter cards having separate I/O and processor sections. The present invention satisfies this need.